In a plasma display panel (hereinafter abbreviated as “panel”) representative of an image display device having a large number of pixels arranged in a plane shape, a large number of discharge cells are formed as the pixels between the front plate and the rear plate faced to each other. For the front plate, a plurality of display electrode pairs, each made of a scan electrode and a sustain electrode, are formed on a front glass substrate in parallel with each other. A dielectric layer and a protective layer are formed to cover these display electrode pairs. For the rear plate, a plurality of parallel data electrodes are formed on a rear glass substrate and a dielectric layer is formed over the data electrodes to cover them. Further, a plurality of barrier ribs are formed on the dielectric layer in parallel with the data electrodes. Phosphor layers are formed over the surface of the dielectric layer and the side faces of the barrier ribs. The front plate and the rear plate are faced to each other and sealed together so that the display electrode pairs are intersected with the data electrodes. A discharge gas is charged into the inside discharge space formed between the plates. Discharge cells are formed in portions where the display electrode pairs are faced to the data electrodes. For a panel structured as above, gas discharge generates ultraviolet light in each discharge cell. This ultraviolet light excites the red (R), green (G), and blue (G) phosphors so that they emit light for color display.
A subfield method is used as the method of driving a panel. In this method, one field period is divided into a plurality of subfields (each hereinafter also abbreviated as “SF”) and the respective discharge cells are lit or unlit in each SF to display an image. Each SF has an initializing period, an address period, and a sustain period. In the initializing period, initializing discharge is caused in the respective discharge cells to form wall charge necessary for the succeeding address operation. In the address period, a scan pulse voltage is sequentially applied to the scan electrodes and an address pulse voltage corresponding to the signals of an image to be displayed is applied to the data electrodes to cause selective address discharge between the scan electrodes and the data electrodes. Thus, wall charge is selectively formed. In the succeeding sustain period, a sustain pulse voltage is applied between the scan electrodes and the sustain electrodes at a predetermined number of times corresponding to the display luminance to be provided. Thus, discharge for lighting is caused selectively in the discharge cells in which wall charge has been formed by the address discharge. The ratio of display luminance between the respective SFs is referred to as “brightness weight”.
In order to drive the panel, a plasma display device includes a scan electrode driver circuit for driving the scan electrodes, a sustain electrode driver circuit for driving the sustain electrodes, and a data electrode driver circuit for driving the data electrodes. Each of these electrode drivers applies a necessary drive voltage waveform to the corresponding electrodes. As seen from the side of the data electrode driver circuit, each data electrode is a capacitive load that has a resultant capacitance of the data electrode, the adjacent data electrodes, and the corresponding scan electrodes and sustain electrodes. Thus, in order to apply the drive voltage waveform to each data electrode, the plasma display device needs to charge and discharge this capacitance. The power consumption of the data electrode driver circuit is not only due to the discharge caused by the address discharge. Rather, the power consumption caused by charging and discharging the capacitance of these data electrodes constitutes a larger proportion. This charge/discharge current depends greatly on the signals of an image to be displayed. For example, when no address pulse voltage is applied to all the data electrodes, the charge/discharge current is 0 and thus the power consumption is at minimum. Similarly, when the address pulse voltage is applied to all the data electrodes, the charge/discharge current is 0 and thus the power consumption is small. However, when the address pulse voltage is applied to the data electrodes at random, the charge/discharge current and thus the power consumption are large.
As described above, the power consumption of the data electrode driver circuit varies greatly according to the image signal. For this reason, the power supply for data electrodes that supplies power to the data electrode driver circuit has been designed to have sufficiently large power supply capacity so that normal address operation can be performed even when the power consumption of the data electrode driver circuit is at maximum. However, as the size and definition of the panel is increasing, the maximum power consumption becomes far larger than the power consumed when a normal image is displayed. It is uneconomical to design the power supply for data electrodes so that necessary power can be supplied even in such a case.
To address this problem, a method of reducing the power consumption is disclosed (for example, see Patent Document 1). In this method, the power consumption of the data electrode driver circuit is estimated according to the signals of an image to be displayed. When the estimated value is equal to or larger than a predetermined value, the address operation in the SFs having smaller brightness weights is stopped to limit gradations so that the power consumption is reduced. Another method of reducing the power consumption is also disclosed (for example, see Patent Document 2). In this method, the power consumption of the data electrode driver circuit is actually detected, and the gradations are limited at large power consumption. Another method of decreasing the temperature is disclosed (for example, see Patent Document 3). In this method, the temperature of the data electrode driver circuit is estimated according to an image data in which image signals are correlated to SFs. When the estimated temperature is high, the image signals are converted to decrease the temperature of the data electrode driver circuit.
However, in the methods of limiting gradations according to the power consumption in the data electrode driver circuit, as disclosed in Patent Document 1 and Patent Document 2, for example, a phenomenon of repeating increases and decreases in power consumption in a short cycle is more likely to occur. For example, in a structure having a protection circuit added to the data electrode driver circuit, the protection circuit also makes frequent protecting operation. This operation can hinder stable display operation by pausing image display for protection or the like. On the other hand, in the method of limiting gradations according to the temperature in the data electrode driver circuit as disclosed in Patent Document 3, frequent protecting operation of the protective circuit can be inhibited; however, a prompt response to a rapid increase in power consumption or the like cannot be made. Further, repeated increases and decreases in power consumption and temperature cause repetition between limitation and non limitation of gradations. This repetition between gradation limitation and non limitation causes flickers in the display image, thus degrading the image.    [Patent Document 1] Japanese Patent Unexamined Publication No. 2000-66638    [Patent Document 2] Japanese Patent Unexamined Publication No. 2003-271094    [Patent Document 3] Japanese Patent Unexamined Publication No. 2002-149109